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INTEGRATED CIRCUITS
DATA SHEET
74ALVCH32501 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
Product specification File under Integrated Circuits, IC24 2000 Mar 16
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
FEATURES * 3-state non-inverting outputs for bus oriented applications * Wide supply voltage range of 1.2 to 3.6 V * Complies with JEDEC standard no. 8-1A * Current drive 24 mA at 3.0 V * Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in transparent, latched or clocked mode * CMOS low power consumption * Direct interface with TTL levels * All inputs have bus-hold circuitry * Output drive capability 50 transmission lines at 85 C * Plastic fine-pitch ball grid array package. DESCRIPTION The 74ALVCH32501 is a high-performance CMOS product designed for VCC operation at 2.5 and 3.3 V with I/O compatibility up to 5 V. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH CI CI/O CPD PARAMETER propagation delay An to Bn; Bn to An input capacitance input/output capacitance power dissipation capacitance per latch VI = GND to VCC; note 1 outputs enabled outputs disabled Note 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; (CL x VCC2 x fo) = sum of the outputs. CONDITIONS CL = 30 pF; VCC = 2.5 V CL = 50 pF; VCC = 3.3 V
74ALVCH32501
The 74ALVCH32501 can be used as two 18-bit transceivers or one 36-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CPAB and CPBA). For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When input LEAB is LOW, the A data is latched if input CPAB is held at a HIGH or LOW level. If input LEAB is LOW, the A data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When input OEAB is HIGH, the outputs are active. When input OEAB is LOW, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B, but uses inputs OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH, and OEBA is active LOW). To ensure the high-impedance state during power-up or power-down, pin OEBA should be tied to VCC through a pull-up resistor and pin OEAB should be tied to GND through a pull-down resistor. The minimum value of the resistor is determined by the current-sinking or current-sourcing capability of the driver.
TYP. 2.8 3.0 4.0 8.0 21 3 ns ns
UNIT
pF pF pF pF
2000 Mar 16
2
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
FUNCTION TABLE See notes 1 and 2. INPUT nOEAB L L L L L L H H H H H H H H Notes 1. A-to-B data flow is shown; B-to-A flow is similar but uses nOEBA, nLEBA and nCPBA. 2. H = HIGH voltage level; h = HIGH voltage level on set-up time prior to the enable or clock transition; L = LOW voltage level; l = LOW voltage level on set-up time prior to the enable or clock transition; NC = no change; X = don't care; = LOW-to-HIGH enable or clock transition; = HIGH-to-LOW enable or clock transition; Z = high impedance OFF-state. nLEAB H L L L H H L L L L nCPAB X X X H or L X X X X H or L H or L nAn X h l X h l H L h l h l X X INTERNAL REGISTERS X H L NC H L H L H L H L H L OUTPUT
74ALVCH32501
OPERATING MODE nBn Z Z Z Z Z Z H L H L H L H L disabled disabled; latch data disabled; hold data disabled; clock data transparent latch data and display clock data and display hold data and display
2000 Mar 16
3
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
ORDERING INFORMATION PACKAGE TYPE NUMBER 74ALVCH32501EC PINNING SYMBOL nAn nBn GND VCC nOEAB nOEBA nLEAB nLEBA nCPAB nCPBA data inputs data outputs ground (0 V) DC supply voltage output enable inputs A to B (active HIGH) output enable inputs B to A (active LOW) latch enable inputs A to B latch enable inputs B to A clock input A to B clock input B to A DESCRIPTION TEMPERATURE RANGE -40 to +85 C PINS 114 PACKAGE LFBGA114
74ALVCH32501
MATERIAL plastic
CODE SOT537-1
handbook, full pagewidth 1B1 1B3 6
1B5 1B4 GND GND 1A4 1A5
1B7 1B6 VCC VCC 1A6 1A7
1B9 1B8 GND GND 1A8 1A9
1B11 1B10 GND GND 1A10 1A11
1B13 1B12 VCC VCC 1A12 1A13
1B14 1B15
1B16
n.c.
2B1 2B0 GND
2B3 2B2 GND
2B5 2B4 VCC VCC 2A4 2A5
2B7 2B6 GND GND 2A6 2A7
2B9 2B8 GND GND 2A8 2A9
2B11 2B10 VCC VCC 2A10 2A11
2B13 2B12
2B14
2B16 2B17
5 4 3 2 1
1B0 1CPAB
1B2 GND
1B17 2CPAB GND
2B15
GND 1CPBA
GND 2CPBA GND GND 2OE BA 2LE BA 2A12 2A13 2A15 2A14 2A17 2A16
1LEAB 1OEAB 1A0 1A1 1A2 1A3
GND 1OE BA 1LE BA 2OEAB GND 1A15 1A14 1A17 2LEAB 1A16 n.c. 2A0 2A1 2A2 2A3
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
MNA562
Fig.1 Pin configuration.
2000 Mar 16
4
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
74ALVCH32501
1OEAB 1CPBA 1LEBA 1CPAB 1LEAB 1OEBA
handbook, halfpage
VCC
data input
to internal circuit
C1 1A0
C1 1B0
MNA473
1D
1D
C1
C1
1D 18 IDENTICAL CHANNELS
1D
Fig.3 Bus-hold circuit.
2OEAB 2CPBA 2LEBA 2CPAB 2LEAB 2OEBA
C1 2A0
C1 2B0
1D
1D
C1
C1
1D 18 IDENTICAL CHANNELS
1D
MNA563
Fig.2 Logic symbol.
2000 Mar 16
5
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER DC supply voltage CONDITIONS
74ALVCH32501
MIN.
MAX. 2.7 3.6 VCC VCC +85 20 10 V V V V
UNIT
2.5 V range (for maximum speed 2.3 performance at 30 pF output load) 3.3 V range (for maximum speed 3.0 performance at 50 pF output load)
VI VO Tamb tr, tf
DC input voltage DC output voltage ambient temperature input rise and fall time ratios (t/V) VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V output HIGH or LOW state
0 0 -40 0 0
C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK VO IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 55 C the value of PD derates linearly with 1.8 mW/K. PARAMETER DC supply voltage DC input voltage DC input diode current DC output voltage DC output sink current DC VCC or GND current storage temperature power dissipation per packages for temperature range: -40 to +85 C; note 2 for control pins; note 1 for data input pins; note 1 VI < 0 see note 1 VO = 0 to VCC DC output clamping diode current VO < 0; note 1 CONDITIONS MIN. -0.5 -0.5 -0.5 - - -0.5 - - -65 - MAX. +4.6 +4.6 -50 50 -50 100 +150 1000 V V mA mA mA mA C mW UNIT
VCC + 0.5 V
VCC + 0.5 V
2000 Mar 16
6
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -100 A IO = -6 mA IO = -12 mA IO = -12 mA IO = -12 mA IO = -24 mA VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 6 mA IO = 12 mA IO = 12 mA IO = 24 mA II IOZ ICC ICC input leakage current 3-state output OFF-state current quiescent supply current additional quiescent supply current given per data I/O pin with bus-hold bus-hold LOW sustaining current bus-hold HIGH sustaining current bus-hold LOW overdrive current bus-hold HIGH overdrive current VI = VCC or GND 2.3 to 3.6 2.3 2.3 2.7 3.0 2.3 to 3.6 - - - - - - - - - 2.3 to 3.6 2.3 2.3 2.7 3.0 3.0 VCC - 0.2 VCC - 0.3 VCC - 0.6 VCC - 0.5 VCC - 0.6 VCC - 1.0 VCC (V) 2.3 to 2.7 2.7 to 3.6 2.3 to 2.7 2.7 to 3.6 MIN. 1.7 2.0 - -
74ALVCH32501
Tamb (C) -40 to +85 TYP.(1) 1.2 1.5 1.2 1.5 VCC MAX. - - 0.7 0.8 - V V V V V V V V V V V V V V V A A A A UNIT
VCC - 0.08 - VCC - 0.26 - VCC - 0.14 - VCC - 0.09 - VCC - 0.28 - GND 0.07 0.15 0.14 0.27 0.1 0.1 0.4 150 0.20 0.40 0.70 0.40 0.55 5 10 80 750
VI = VIH or VIL; 2.3 to 3.6 VO = VCC or GND; note 2 VI = VCC or GND; IO = 0 VI = VCC - 0.6 V; IO = 0 2.3 to 3.6 2.7 to 3.6
IBHL IBHH IBHLO IBHHO Notes
VI = 0.7 V; note 3 VI = 0.8 V; note 3 VI = 1.7 V; note 3 VI = 2.0 V; note 3 note 3 note 3
2.3 3.0 2.3 3.0 3.6 3.6
45 75 -45 -75 500 -500
- 150 - -175 - -
- - - - - -
A A A A A A
1. All typical values are at VCC = 3.3 V and Tamb = 25 C. 2. For I/O ports, the parameter IOZ includes the input leakage current. 3. Valid for data inputs of bus-hold parts. 2000 Mar 16 7
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
AC CHARACTERISTICS GND = 0 V TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS VCC = 2.3 to 2.7 V; tr = tf 2.0 ns; note 1 tPHL/tPLH propagation delay nAn to nBn; nBn to nAn nLEBA to nAn; nLEAB to nBn nCPBA to nAn; nCPAB to nBn tPZH/tPZL tPHZ/tPLZ tW 3-state output enable time nOEAB to nBn 3-state output enable time nOEBA to nAn 3-state output disable time nOEAB to nBn 3-state output disable time nOEBA to nAn nLEAB or nLEBA pulse width HIGH nCPAB or nCPBA pulse width HIGH or LOW tsu see Figs 4 and 8 30 pF see Figs 5 and 8 see Figs 5 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 5 and 8 see Figs 5 and 8 1.0 1.1 1.0 1.0 1.3 1.5 1.3 3.3 3.3 1.7 1.1 1.7 1.6 150 CL
74ALVCH32501
Tamb = -40 to +85 C MIN. TYP. MAX.
UNIT
2.8 3.5 3.3 2.5 2.8 2.5 2.5 0.8 2.0 0.1 0.1 0.3 0.3 330
5.1 6.1 6.1 5.8 6.3 6.2 5.3 - - - - - - -
ns ns ns ns ns ns ns ns ns ns ns ns ns MHz
set-up time see Figs 7 and 8 nAn before nCPAB or nBn before nCPBA set-up time CP HIGH or LOW nAn before nLEAB or nBn before nLEBA see Figs 7 and 8 see Figs 7 and 8 see Figs 7 and 8 see Figs 5 and 8
th
hold time nAn after nCPAB or nBn after nCPBA hold time CP HIGH or LOW nAn after nLEAB or nBn after nLEBA
fmax
maximum clock frequency
VCC = 2.7 V; tr = tf 2.5 ns; note 2 tPHL/tPLH propagation delay nAn to nBn; nBn to nAn nLEBA to nAn; nLEAB to nBn nCPBA to nAn; nCPAB to nBn tPZH/tPZL tPHZ/tPLZ tW 3-state output enable time nOEAB to nBn 3-state output enable time nOEBA to nAn 3-state output disable time nOEAB to nBn 3-state output disable time nOEBA to nAn pulse width nLEAB or nLEBA HIGH pulse width nCPAB or nCPBA HIGH or LOW see Figs 4 and 8 50 pF see Figs 5 and 8 see Figs 5 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 5 and 8 see Figs 5 and 8 - - - - - - - 3.3 3.3 3.0 3.6 3.4 2.7 3.3 3.6 3.3 0.7 1.4 4.6 5.3 5.6 5.3 6.0 5.7 4.6 - - ns ns ns ns ns ns ns ns ns
2000 Mar 16
8
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
TEST CONDITIONS SYMBOL tsu PARAMETER WAVEFORMS CL set-up time see Figs 7 and 8 50 pF nAn before nCPAB or nBn before nCPBA set-up time CP HIGH or LOW nAn before nLEAB or nBn before nLEBA th hold time nAn after nCPAB or nBn after nCPBA hold time CP HIGH or LOW nAn after nLEAB or nBn after nLEBA fmax maximum clock frequency VCC = 3.0 to 3.6 V; tr = tf 2.5 ns; note 3 tPHL/tPLH propagation delay nAn to nBn; nBn to nAn nLEBA to nAn; nLEAB to nBn nCPBA to nAn; nCPAB to nBn tPZH/tPZL tPHZ/tPLZ tW 3-state output enable time nOEAB to nBn 3-state output enable time nOEBA to nAn 3-state output disable time nOEAB to nBn 3-state output disable time nOEBA to nAn pulse width nLEAB or nLEBA HIGH pulse width nCPAB or nCPBA HIGH or LOW tsu see Figs 4 and 8 50 pF see Figs 5 and 8 see Figs 5 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 6 and 8 see Figs 5 and 8 see Figs 5 and 8 1.0 1.3 1.4 1.0 1.1 1.4 1.3 3.3 3.3 +1.3 1.0 +1.3 1.2 150 see Figs 7 and 8 see Figs 7 and 8 see Figs 7 and 8 see Figs 5 and 8
74ALVCH32501
Tamb = -40 to +85 C MIN. +1.4 +1.0 1.6 1.5 150 TYP. -0.1 -0.2 0.3 0.1 333 MAX. - - - - - ns ns ns ns MHz
UNIT
3.0 3.4 3.3 2.4 2.5 2.9 3.1 0.9 1.1 -0.3 0.3 -0.4 0.1 340
4.2 4.8 4.9 4.6 5.0 5.0 4.2 - - - - - - -
ns ns ns ns ns ns ns ns ns ns ns ns ns MHz
set-up time see Figs 7 and 8 nAn before nCPAB or nBn before nCPBA set-up time CP HIGH or LOW nAn before nLEAB or nBn before nLEBA see Figs 7 and 8 see Figs 7 and 8 see Figs 7 and 8 see Figs 5 and 8
th
hold time nAn after nCPAB or nBn after nCPBA hold time CP HIGH or LOW nAn after nLEAB or nBn after nLEBA
fmax Notes
maximum clock frequency
1. All typical values are measured at VCC = 2.5 V and Tamb = 25 C. 2. All typical values are measured at Tamb = 25 C. 3. All typical values are measured at VCC = 3.3 V and Tamb = 25 C.
2000 Mar 16
9
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
AC WAVEFORMS
74ALVCH32501
handbook, halfpage VI
nAn, nBn input GND t PHL VOH nBn, nAn output VOL
VM
t PLH
VM
MNA564
VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 1.5 V 1.5 V
VM 0.5 x VCC VCC 2.7 V 2.7 V
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.4 Input nAn, nBn to output nBn, nAn propagation delay times.
handbook, full pagewidth
1/fmax nLEAB, nLEBA, nCPAB, nCPBA input VI VM GND tW t PHL VOH nAn, nBn output VOL VM
MNA565
t PLH
VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 1.5 V 1.5 V
VM 0.5 x VCC VCC 2.7 V 2.7 V
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.5
Latch enable input (nLEAB, nLEBA) and clock input (nCPAB, nCPBA) to output propagation delays and their pulse width.
2000 Mar 16
10
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
OEAB input VM OEBA input t PLZ output LOW-to-OFF OFF-to-LOW VCC VM VOL t PHZ output HIGH-to-OFF OFF-to-HIGH VOH VY VM VX t PZH t PZL VM
74ALVCH32501
handbook, full pagewidth
GND outputs enabled outputs disabled outputs enabled
MNA566
VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 1.5 V 1.5 V
VM 0.5 x VCC
VX VOL + 150 mV VOL + 300 mV VOL + 300 mV
VY VOH - 150 mV VOH - 300 mV VOH - 300 mV VCC 2.7 V 2.7 V
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 3-state enable and disable times.
handbook, full pagewidth
VI nAn, nBn input GND th tsu nLEAB, nLEBA, VI VM
MNA567
VM
th tsu
nCPAB, nCPBA input GND
The shaded areas indicate when the input is permitted to change for predictable output performance.
VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 1.5 V 1.5 V
VM 0.5 x VCC VCC 2.7 V 2.7 V
VI
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 Data set-up and hold times for the nAn and nBn inputs to the nLEAB, nLEBA, nCPAB and nCPBA inputs.
2000 Mar 16
11
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
74ALVCH32501
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL 50 pF RL 500 VO
RL 500
2 x VCC open GND
MNA479
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
S1 open 2 x VCC GND
Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Z0 of the pulse generator.
Fig.8 Load circuitry for switching times.
2000 Mar 16
12
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
PACKAGE OUTLINE
74ALVCH32501
LFBGA114: plastic low profile fine-pitch ball grid array package; 114 balls; body 16 x 5.5 x 1.05 mm SOT537-1
D B A
ball A1 index area
A E
A2 A1 detail X
e1 e W V U T R P N M L K J H G F E D C B A 123456 b
C vMB
w M
y1 C vMA
y
e
e2
X
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.41 0.31 A2 1.2 0.9 b 0.51 0.41 D 5.6 5.4 E 16.1 15.9 e 0.8 e1 4.0 e2 14.4 v 0.15 w 0.1 y 0.1 y1 0.2 0 5 scale 10 mm
OUTLINE VERSION SOT537-1
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 99-12-02 00-03-04
2000 Mar 16
13
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. Manual soldering
74ALVCH32501
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2000 Mar 16
14
Philips Semiconductors
Product specification
36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state
Suitability of surface mount IC packages for wave and reflow soldering methods
74ALVCH32501
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 Mar 16
15
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613507/01/pp16
Date of release: 2000
Mar 16
Document order number:
9397 750 06819

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